Job Responsibility
- Perform analog and mixed-signal physical design;
- Perform layout verification (DRC, LVS);
- Modify and verify in-house DRC & LVS command files.
Job Qualification
- BS with above 2 years of industry IC layout experience, BSEE is preferred;
- Good understanding of basic electronic principles dealing with circuit and layout design;
- Prior experience with 16nm/14nm/12nm/7nm high speed circuit or DDR or Serdes is a plus;
- Familiar with IC layout methodologies and flows;
- Familiar with CAD tools such as Cadence virtuoso layout, PCELLs, Calibre physical verification;
- Familiar with Calibre DRC & LVS command files;
- Prior experience in stand-cell built is a plus.