Staff IC Design Engineer – RF IP Design

If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high performance analog semiconductors whose solutions are powering the wireless networking revolution. At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management and the freedom to make meaningful contributions in a setting that encourages creativity and out-of-the-box thinking.  Our work culture values diversity, social responsibility, open communication, mutual trust and respect.  We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together can change the way the world communicates.

Requisition ID: 64338

Job Description

 

Staff IC Design Engineer – RF IP Design

Skyworks Solutions is seeking a Senior RF IC design engineer responsible for the development of RF IP blocks in next generation silicon processes including RF SOI, SiGe BiCMOS and advanced RF CMOS. These RF IPs include but are not limited to RF Amplifier (PA, LNA, Drivers), attenuators (DSA, VGA), limiters, switches, phase shifters and filters that will be used in RF front end products for cellular, Wifi and mmW applications.

 

The role will be part of a Systems, IP and Technology Team, reporting directly into the Technical Director & will focus on the creation and delivery of new RF silicon platforms to Skyworks’s product development teams.

 

The role includes interfacing directly with project engineers, product level designs, systems engineering and device technologist to define targets, demonstrate IP performance and meet schedule requirements.

The candidate should have an in-depth working knowledge and experience designing silicon ICs in a Cadence environment, including schematic capture, RF simulation and layout, as well as LVS, Parasitic extraction and EM simulation.  Designs will include the use of layout and EM tools. Hands-on lab evaluation or supervision of support personal will be part of the design validation process.

 

Preference will be given to candidates with RF SOI, and SiGe BiCMOS design experience.

Unless a preference is expressed, the hired candidate will split their time between our Woburn and Andover sites. 

Experience and Qualifications

 

Desired experience: 

•    BS + 5 years or MSEE/PhD + 3 years of relevant experience
•    History of releasing an IC product to the market place is required
•    RFIC design and layout experience with SOI, BiCMOS or RF CMOS technologies
•    Exposure to III-V amplifier design is a bonus
•    Familiar with amplifier modes of operation such as class A, AB, C, F
•    Familiar with general PA/LNA bias circuit design considerations.
•    Experience with EM tools and passive components including couplers/baluns and matching networks.
•    Expertise with Keysight ADS and/or Cadence and associated simulation engines and data displays.
•    Experience with IC layout using Cadence Virtuoso, including LVS, DRC and PEX.
•    Familiarity with thermal and reliability considerations
•    Ability to execute project tasks with minimum supervision.
•    Ability to work on multiple projects and technologies in parallel
•    Strong Lab skills to perform or assist with characterization and debugging using RF test equipment.
•    Familiar with load pull techniques to evaluate device and PA performance.
•    Team player with a focus on product requirements schedule.
•    Solid oral and written communication skills.

 

Responsibilities:

•    Perform feasibility analysis of new amplifiers devices, amplifier IP blocks and amplifiers architectures
•    Design, simulate and layout baseline PA IP and relevant product demonstrators
•    Co-optimize PA/LNA design, silicon process and design kit in collaboration with technology and foundry engineers
•    Perform hardware validation (or support validation team) and analyze data to back-fit and validate IP
•    Work with cross functional teams including program management, product and system engineers, process/device technologists, analog design, layout, and test engineers.
•    Manage design tradeoffs on performance, risk, reliability, yield, testability and cost.
•    Prepare and present design reviews during the development process

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Skyworks is an Equal Opportunity Employer.  All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law.

 

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